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44-Pin Demo Board User’s Guide
3.2.4.1
ADCON1
The ADCON1 register sets the justification of the 10-bit result in the 16-bit result read
through registers ADRESL and ADRESH. Setting the result to Left Justified means the
8 Most Significant bits and read from ADRESH and the 2 Least Significant bits are read
from bits 7 and 6 of ADRESL. ADCON1 also sets the voltage reference sources V REF+
and V REF-. V REF- is the voltage at which the result will be zero. V REF+ is the voltage at
which the result will be maximum (1023). We select the PIC16F887 V SS and V DD
voltages respectively.
REGISTER 3-1:
ADCON1: A/D CONTROL REGISTER 1
R/W-0
ADFM
U-0
—
R/W-0
VCFG1
R/W-0
VCFG0
U-0
—
U-0
—
U-0
—
U-0
—
bit 7
Legend:
bit 0
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5
bit 4
bit 3-0
3.2.4.2
ADFM: A/D Conversion Result Format Selection bit
1 = Right justified
0 = Left justified
Unimplemented: Read as ‘ 0 ’
VCFG1: Voltage Reference bit
1 = V REF - pin
0 = Vss
VCFG0: Voltage Reference bit
1 = V REF + pin
0 = V DD
Unimplemented: Read as ‘ 0 ’
ADCON0
ADCON0 controls the ADC operation. Bit 0 turns on the ADC module and bit 1 starts a
conversion. Bits <7:6> select the ratio between the processor clock and conversion
speed and bits <5:2> select which channel the ADC will operate on. The ratio between
the processor clock and conversion speed is important because the ADC needs at
least 1.6 μ s per bit. Accuracy degrades if the clock speed is too high. As the processor
clock speed increases, an increasingly large divider is necessary to keep the conver-
sion bit speed above 1.6 μ s. Four MHz gives the fastest conversion rate above the min-
imum at 8:1 ratio. This results in a conversion speed of 2 μ s per bit. Refer to the “T AD
vs. Device Operating Frequencies” Table in the Analog-to-Digital section of the
PIC16F882/883/884/886/887 Data Sheet (DS41291) for recommended configurations.
For purposes of this lesson, the ADC must be turned on and pointed to channel AN0
on pin RA0.
The ADC needs about 5 μ s, after changing channels, to allow the ADC sampling capac-
itor to settle. Finally, we can start the conversion by setting the GO bit in ADCON0. The
bit also serves as the DONE flag. That is, the ADC will clear the same bit when the con-
version is complete. The answer is then available in ADRESH:ADRESL. This lesson
takes the high order 8 bits of the result and copies them to the display LEDs attached
to PORTD.
DS41296B-page 20
? 2007 Microchip Technology Inc.
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